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annotate CSP2/CSP2_env/env-d9b9114564458d9d-741b3de822f2aaca6c6caa4325c4afce/share/aclocal/host-cpu-c-abi.m4 @ 68:5028fdace37b

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planemo upload commit 2e9511a184a1ca667c7be0c6321a36dc4e3d116d
author jpayne
date Tue, 18 Mar 2025 16:23:26 -0400
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jpayne@68 1 # host-cpu-c-abi.m4 serial 17
jpayne@68 2 dnl Copyright (C) 2002-2024 Free Software Foundation, Inc.
jpayne@68 3 dnl This file is free software; the Free Software Foundation
jpayne@68 4 dnl gives unlimited permission to copy and/or distribute it,
jpayne@68 5 dnl with or without modifications, as long as this notice is preserved.
jpayne@68 6
jpayne@68 7 dnl From Bruno Haible and Sam Steingold.
jpayne@68 8
jpayne@68 9 dnl Sets the HOST_CPU variable to the canonical name of the CPU.
jpayne@68 10 dnl Sets the HOST_CPU_C_ABI variable to the canonical name of the CPU with its
jpayne@68 11 dnl C language ABI (application binary interface).
jpayne@68 12 dnl Also defines __${HOST_CPU}__ and __${HOST_CPU_C_ABI}__ as C macros in
jpayne@68 13 dnl config.h.
jpayne@68 14 dnl
jpayne@68 15 dnl This canonical name can be used to select a particular assembly language
jpayne@68 16 dnl source file that will interoperate with C code on the given host.
jpayne@68 17 dnl
jpayne@68 18 dnl For example:
jpayne@68 19 dnl * 'i386' and 'sparc' are different canonical names, because code for i386
jpayne@68 20 dnl will not run on SPARC CPUs and vice versa. They have different
jpayne@68 21 dnl instruction sets.
jpayne@68 22 dnl * 'sparc' and 'sparc64' are different canonical names, because code for
jpayne@68 23 dnl 'sparc' and code for 'sparc64' cannot be linked together: 'sparc' code
jpayne@68 24 dnl contains 32-bit instructions, whereas 'sparc64' code contains 64-bit
jpayne@68 25 dnl instructions. A process on a SPARC CPU can be in 32-bit mode or in 64-bit
jpayne@68 26 dnl mode, but not both.
jpayne@68 27 dnl * 'mips' and 'mipsn32' are different canonical names, because they use
jpayne@68 28 dnl different argument passing and return conventions for C functions, and
jpayne@68 29 dnl although the instruction set of 'mips' is a large subset of the
jpayne@68 30 dnl instruction set of 'mipsn32'.
jpayne@68 31 dnl * 'mipsn32' and 'mips64' are different canonical names, because they use
jpayne@68 32 dnl different sizes for the C types like 'int' and 'void *', and although
jpayne@68 33 dnl the instruction sets of 'mipsn32' and 'mips64' are the same.
jpayne@68 34 dnl * The same canonical name is used for different endiannesses. You can
jpayne@68 35 dnl determine the endianness through preprocessor symbols:
jpayne@68 36 dnl - 'arm': test __ARMEL__.
jpayne@68 37 dnl - 'mips', 'mipsn32', 'mips64': test _MIPSEB vs. _MIPSEL.
jpayne@68 38 dnl - 'powerpc64': test _BIG_ENDIAN vs. _LITTLE_ENDIAN.
jpayne@68 39 dnl * The same name 'i386' is used for CPUs of type i386, i486, i586
jpayne@68 40 dnl (Pentium), AMD K7, Pentium II, Pentium IV, etc., because
jpayne@68 41 dnl - Instructions that do not exist on all of these CPUs (cmpxchg,
jpayne@68 42 dnl MMX, SSE, SSE2, 3DNow! etc.) are not frequently used. If your
jpayne@68 43 dnl assembly language source files use such instructions, you will
jpayne@68 44 dnl need to make the distinction.
jpayne@68 45 dnl - Speed of execution of the common instruction set is reasonable across
jpayne@68 46 dnl the entire family of CPUs. If you have assembly language source files
jpayne@68 47 dnl that are optimized for particular CPU types (like GNU gmp has), you
jpayne@68 48 dnl will need to make the distinction.
jpayne@68 49 dnl See <https://en.wikipedia.org/wiki/X86_instruction_listings>.
jpayne@68 50 AC_DEFUN([gl_HOST_CPU_C_ABI],
jpayne@68 51 [
jpayne@68 52 AC_REQUIRE([AC_CANONICAL_HOST])
jpayne@68 53 AC_REQUIRE([gl_C_ASM])
jpayne@68 54 AC_CACHE_CHECK([host CPU and C ABI], [gl_cv_host_cpu_c_abi],
jpayne@68 55 [case "$host_cpu" in
jpayne@68 56
jpayne@68 57 changequote(,)dnl
jpayne@68 58 i[34567]86 )
jpayne@68 59 changequote([,])dnl
jpayne@68 60 gl_cv_host_cpu_c_abi=i386
jpayne@68 61 ;;
jpayne@68 62
jpayne@68 63 x86_64 )
jpayne@68 64 # On x86_64 systems, the C compiler may be generating code in one of
jpayne@68 65 # these ABIs:
jpayne@68 66 # - 64-bit instruction set, 64-bit pointers, 64-bit 'long': x86_64.
jpayne@68 67 # - 64-bit instruction set, 64-bit pointers, 32-bit 'long': x86_64
jpayne@68 68 # with native Windows (mingw, MSVC).
jpayne@68 69 # - 64-bit instruction set, 32-bit pointers, 32-bit 'long': x86_64-x32.
jpayne@68 70 # - 32-bit instruction set, 32-bit pointers, 32-bit 'long': i386.
jpayne@68 71 AC_COMPILE_IFELSE(
jpayne@68 72 [AC_LANG_SOURCE(
jpayne@68 73 [[#if (defined __x86_64__ || defined __amd64__ \
jpayne@68 74 || defined _M_X64 || defined _M_AMD64)
jpayne@68 75 int ok;
jpayne@68 76 #else
jpayne@68 77 error fail
jpayne@68 78 #endif
jpayne@68 79 ]])],
jpayne@68 80 [AC_COMPILE_IFELSE(
jpayne@68 81 [AC_LANG_SOURCE(
jpayne@68 82 [[#if defined __ILP32__ || defined _ILP32
jpayne@68 83 int ok;
jpayne@68 84 #else
jpayne@68 85 error fail
jpayne@68 86 #endif
jpayne@68 87 ]])],
jpayne@68 88 [gl_cv_host_cpu_c_abi=x86_64-x32],
jpayne@68 89 [gl_cv_host_cpu_c_abi=x86_64])],
jpayne@68 90 [gl_cv_host_cpu_c_abi=i386])
jpayne@68 91 ;;
jpayne@68 92
jpayne@68 93 changequote(,)dnl
jpayne@68 94 alphaev[4-8] | alphaev56 | alphapca5[67] | alphaev6[78] )
jpayne@68 95 changequote([,])dnl
jpayne@68 96 gl_cv_host_cpu_c_abi=alpha
jpayne@68 97 ;;
jpayne@68 98
jpayne@68 99 arm* | aarch64 )
jpayne@68 100 # Assume arm with EABI.
jpayne@68 101 # On arm64 systems, the C compiler may be generating code in one of
jpayne@68 102 # these ABIs:
jpayne@68 103 # - aarch64 instruction set, 64-bit pointers, 64-bit 'long': arm64.
jpayne@68 104 # - aarch64 instruction set, 32-bit pointers, 32-bit 'long': arm64-ilp32.
jpayne@68 105 # - 32-bit instruction set, 32-bit pointers, 32-bit 'long': arm or armhf.
jpayne@68 106 AC_COMPILE_IFELSE(
jpayne@68 107 [AC_LANG_SOURCE(
jpayne@68 108 [[#ifdef __aarch64__
jpayne@68 109 int ok;
jpayne@68 110 #else
jpayne@68 111 error fail
jpayne@68 112 #endif
jpayne@68 113 ]])],
jpayne@68 114 [AC_COMPILE_IFELSE(
jpayne@68 115 [AC_LANG_SOURCE(
jpayne@68 116 [[#if defined __ILP32__ || defined _ILP32
jpayne@68 117 int ok;
jpayne@68 118 #else
jpayne@68 119 error fail
jpayne@68 120 #endif
jpayne@68 121 ]])],
jpayne@68 122 [gl_cv_host_cpu_c_abi=arm64-ilp32],
jpayne@68 123 [gl_cv_host_cpu_c_abi=arm64])],
jpayne@68 124 [# Don't distinguish little-endian and big-endian arm, since they
jpayne@68 125 # don't require different machine code for simple operations and
jpayne@68 126 # since the user can distinguish them through the preprocessor
jpayne@68 127 # defines __ARMEL__ vs. __ARMEB__.
jpayne@68 128 # But distinguish arm which passes floating-point arguments and
jpayne@68 129 # return values in integer registers (r0, r1, ...) - this is
jpayne@68 130 # gcc -mfloat-abi=soft or gcc -mfloat-abi=softfp - from arm which
jpayne@68 131 # passes them in float registers (s0, s1, ...) and double registers
jpayne@68 132 # (d0, d1, ...) - this is gcc -mfloat-abi=hard. GCC 4.6 or newer
jpayne@68 133 # sets the preprocessor defines __ARM_PCS (for the first case) and
jpayne@68 134 # __ARM_PCS_VFP (for the second case), but older GCC does not.
jpayne@68 135 echo 'double ddd; void func (double dd) { ddd = dd; }' > conftest.c
jpayne@68 136 # Look for a reference to the register d0 in the .s file.
jpayne@68 137 AC_TRY_COMMAND(${CC-cc} $CFLAGS $CPPFLAGS $gl_c_asm_opt conftest.c) >/dev/null 2>&1
jpayne@68 138 if LC_ALL=C grep 'd0,' conftest.$gl_asmext >/dev/null; then
jpayne@68 139 gl_cv_host_cpu_c_abi=armhf
jpayne@68 140 else
jpayne@68 141 gl_cv_host_cpu_c_abi=arm
jpayne@68 142 fi
jpayne@68 143 rm -f conftest*
jpayne@68 144 ])
jpayne@68 145 ;;
jpayne@68 146
jpayne@68 147 hppa1.0 | hppa1.1 | hppa2.0* | hppa64 )
jpayne@68 148 # On hppa, the C compiler may be generating 32-bit code or 64-bit
jpayne@68 149 # code. In the latter case, it defines _LP64 and __LP64__.
jpayne@68 150 AC_COMPILE_IFELSE(
jpayne@68 151 [AC_LANG_SOURCE(
jpayne@68 152 [[#ifdef __LP64__
jpayne@68 153 int ok;
jpayne@68 154 #else
jpayne@68 155 error fail
jpayne@68 156 #endif
jpayne@68 157 ]])],
jpayne@68 158 [gl_cv_host_cpu_c_abi=hppa64],
jpayne@68 159 [gl_cv_host_cpu_c_abi=hppa])
jpayne@68 160 ;;
jpayne@68 161
jpayne@68 162 ia64* )
jpayne@68 163 # On ia64 on HP-UX, the C compiler may be generating 64-bit code or
jpayne@68 164 # 32-bit code. In the latter case, it defines _ILP32.
jpayne@68 165 AC_COMPILE_IFELSE(
jpayne@68 166 [AC_LANG_SOURCE(
jpayne@68 167 [[#ifdef _ILP32
jpayne@68 168 int ok;
jpayne@68 169 #else
jpayne@68 170 error fail
jpayne@68 171 #endif
jpayne@68 172 ]])],
jpayne@68 173 [gl_cv_host_cpu_c_abi=ia64-ilp32],
jpayne@68 174 [gl_cv_host_cpu_c_abi=ia64])
jpayne@68 175 ;;
jpayne@68 176
jpayne@68 177 mips* )
jpayne@68 178 # We should also check for (_MIPS_SZPTR == 64), but gcc keeps this
jpayne@68 179 # at 32.
jpayne@68 180 AC_COMPILE_IFELSE(
jpayne@68 181 [AC_LANG_SOURCE(
jpayne@68 182 [[#if defined _MIPS_SZLONG && (_MIPS_SZLONG == 64)
jpayne@68 183 int ok;
jpayne@68 184 #else
jpayne@68 185 error fail
jpayne@68 186 #endif
jpayne@68 187 ]])],
jpayne@68 188 [gl_cv_host_cpu_c_abi=mips64],
jpayne@68 189 [# In the n32 ABI, _ABIN32 is defined, _ABIO32 is not defined (but
jpayne@68 190 # may later get defined by <sgidefs.h>), and _MIPS_SIM == _ABIN32.
jpayne@68 191 # In the 32 ABI, _ABIO32 is defined, _ABIN32 is not defined (but
jpayne@68 192 # may later get defined by <sgidefs.h>), and _MIPS_SIM == _ABIO32.
jpayne@68 193 AC_COMPILE_IFELSE(
jpayne@68 194 [AC_LANG_SOURCE(
jpayne@68 195 [[#if (_MIPS_SIM == _ABIN32)
jpayne@68 196 int ok;
jpayne@68 197 #else
jpayne@68 198 error fail
jpayne@68 199 #endif
jpayne@68 200 ]])],
jpayne@68 201 [gl_cv_host_cpu_c_abi=mipsn32],
jpayne@68 202 [gl_cv_host_cpu_c_abi=mips])])
jpayne@68 203 ;;
jpayne@68 204
jpayne@68 205 powerpc* )
jpayne@68 206 # Different ABIs are in use on AIX vs. Mac OS X vs. Linux,*BSD.
jpayne@68 207 # No need to distinguish them here; the caller may distinguish
jpayne@68 208 # them based on the OS.
jpayne@68 209 # On powerpc64 systems, the C compiler may still be generating
jpayne@68 210 # 32-bit code. And on powerpc-ibm-aix systems, the C compiler may
jpayne@68 211 # be generating 64-bit code.
jpayne@68 212 AC_COMPILE_IFELSE(
jpayne@68 213 [AC_LANG_SOURCE(
jpayne@68 214 [[#if defined __powerpc64__ || defined __LP64__
jpayne@68 215 int ok;
jpayne@68 216 #else
jpayne@68 217 error fail
jpayne@68 218 #endif
jpayne@68 219 ]])],
jpayne@68 220 [# On powerpc64, there are two ABIs on Linux: The AIX compatible
jpayne@68 221 # one and the ELFv2 one. The latter defines _CALL_ELF=2.
jpayne@68 222 AC_COMPILE_IFELSE(
jpayne@68 223 [AC_LANG_SOURCE(
jpayne@68 224 [[#if defined _CALL_ELF && _CALL_ELF == 2
jpayne@68 225 int ok;
jpayne@68 226 #else
jpayne@68 227 error fail
jpayne@68 228 #endif
jpayne@68 229 ]])],
jpayne@68 230 [gl_cv_host_cpu_c_abi=powerpc64-elfv2],
jpayne@68 231 [gl_cv_host_cpu_c_abi=powerpc64])
jpayne@68 232 ],
jpayne@68 233 [gl_cv_host_cpu_c_abi=powerpc])
jpayne@68 234 ;;
jpayne@68 235
jpayne@68 236 rs6000 )
jpayne@68 237 gl_cv_host_cpu_c_abi=powerpc
jpayne@68 238 ;;
jpayne@68 239
jpayne@68 240 riscv32 | riscv64 )
jpayne@68 241 # There are 2 architectures (with variants): rv32* and rv64*.
jpayne@68 242 AC_COMPILE_IFELSE(
jpayne@68 243 [AC_LANG_SOURCE(
jpayne@68 244 [[#if __riscv_xlen == 64
jpayne@68 245 int ok;
jpayne@68 246 #else
jpayne@68 247 error fail
jpayne@68 248 #endif
jpayne@68 249 ]])],
jpayne@68 250 [cpu=riscv64],
jpayne@68 251 [cpu=riscv32])
jpayne@68 252 # There are 6 ABIs: ilp32, ilp32f, ilp32d, lp64, lp64f, lp64d.
jpayne@68 253 # Size of 'long' and 'void *':
jpayne@68 254 AC_COMPILE_IFELSE(
jpayne@68 255 [AC_LANG_SOURCE(
jpayne@68 256 [[#if defined __LP64__
jpayne@68 257 int ok;
jpayne@68 258 #else
jpayne@68 259 error fail
jpayne@68 260 #endif
jpayne@68 261 ]])],
jpayne@68 262 [main_abi=lp64],
jpayne@68 263 [main_abi=ilp32])
jpayne@68 264 # Float ABIs:
jpayne@68 265 # __riscv_float_abi_double:
jpayne@68 266 # 'float' and 'double' are passed in floating-point registers.
jpayne@68 267 # __riscv_float_abi_single:
jpayne@68 268 # 'float' are passed in floating-point registers.
jpayne@68 269 # __riscv_float_abi_soft:
jpayne@68 270 # No values are passed in floating-point registers.
jpayne@68 271 AC_COMPILE_IFELSE(
jpayne@68 272 [AC_LANG_SOURCE(
jpayne@68 273 [[#if defined __riscv_float_abi_double
jpayne@68 274 int ok;
jpayne@68 275 #else
jpayne@68 276 error fail
jpayne@68 277 #endif
jpayne@68 278 ]])],
jpayne@68 279 [float_abi=d],
jpayne@68 280 [AC_COMPILE_IFELSE(
jpayne@68 281 [AC_LANG_SOURCE(
jpayne@68 282 [[#if defined __riscv_float_abi_single
jpayne@68 283 int ok;
jpayne@68 284 #else
jpayne@68 285 error fail
jpayne@68 286 #endif
jpayne@68 287 ]])],
jpayne@68 288 [float_abi=f],
jpayne@68 289 [float_abi=''])
jpayne@68 290 ])
jpayne@68 291 gl_cv_host_cpu_c_abi="${cpu}-${main_abi}${float_abi}"
jpayne@68 292 ;;
jpayne@68 293
jpayne@68 294 s390* )
jpayne@68 295 # On s390x, the C compiler may be generating 64-bit (= s390x) code
jpayne@68 296 # or 31-bit (= s390) code.
jpayne@68 297 AC_COMPILE_IFELSE(
jpayne@68 298 [AC_LANG_SOURCE(
jpayne@68 299 [[#if defined __LP64__ || defined __s390x__
jpayne@68 300 int ok;
jpayne@68 301 #else
jpayne@68 302 error fail
jpayne@68 303 #endif
jpayne@68 304 ]])],
jpayne@68 305 [gl_cv_host_cpu_c_abi=s390x],
jpayne@68 306 [gl_cv_host_cpu_c_abi=s390])
jpayne@68 307 ;;
jpayne@68 308
jpayne@68 309 sparc | sparc64 )
jpayne@68 310 # UltraSPARCs running Linux have `uname -m` = "sparc64", but the
jpayne@68 311 # C compiler still generates 32-bit code.
jpayne@68 312 AC_COMPILE_IFELSE(
jpayne@68 313 [AC_LANG_SOURCE(
jpayne@68 314 [[#if defined __sparcv9 || defined __arch64__
jpayne@68 315 int ok;
jpayne@68 316 #else
jpayne@68 317 error fail
jpayne@68 318 #endif
jpayne@68 319 ]])],
jpayne@68 320 [gl_cv_host_cpu_c_abi=sparc64],
jpayne@68 321 [gl_cv_host_cpu_c_abi=sparc])
jpayne@68 322 ;;
jpayne@68 323
jpayne@68 324 *)
jpayne@68 325 gl_cv_host_cpu_c_abi="$host_cpu"
jpayne@68 326 ;;
jpayne@68 327 esac
jpayne@68 328 ])
jpayne@68 329
jpayne@68 330 dnl In most cases, $HOST_CPU and $HOST_CPU_C_ABI are the same.
jpayne@68 331 HOST_CPU=`echo "$gl_cv_host_cpu_c_abi" | sed -e 's/-.*//'`
jpayne@68 332 HOST_CPU_C_ABI="$gl_cv_host_cpu_c_abi"
jpayne@68 333 AC_SUBST([HOST_CPU])
jpayne@68 334 AC_SUBST([HOST_CPU_C_ABI])
jpayne@68 335
jpayne@68 336 # This was
jpayne@68 337 # AC_DEFINE_UNQUOTED([__${HOST_CPU}__])
jpayne@68 338 # AC_DEFINE_UNQUOTED([__${HOST_CPU_C_ABI}__])
jpayne@68 339 # earlier, but KAI C++ 3.2d doesn't like this.
jpayne@68 340 sed -e 's/-/_/g' >> confdefs.h <<EOF
jpayne@68 341 #ifndef __${HOST_CPU}__
jpayne@68 342 #define __${HOST_CPU}__ 1
jpayne@68 343 #endif
jpayne@68 344 #ifndef __${HOST_CPU_C_ABI}__
jpayne@68 345 #define __${HOST_CPU_C_ABI}__ 1
jpayne@68 346 #endif
jpayne@68 347 EOF
jpayne@68 348 AH_TOP([/* CPU and C ABI indicator */
jpayne@68 349 #ifndef __i386__
jpayne@68 350 #undef __i386__
jpayne@68 351 #endif
jpayne@68 352 #ifndef __x86_64_x32__
jpayne@68 353 #undef __x86_64_x32__
jpayne@68 354 #endif
jpayne@68 355 #ifndef __x86_64__
jpayne@68 356 #undef __x86_64__
jpayne@68 357 #endif
jpayne@68 358 #ifndef __alpha__
jpayne@68 359 #undef __alpha__
jpayne@68 360 #endif
jpayne@68 361 #ifndef __arm__
jpayne@68 362 #undef __arm__
jpayne@68 363 #endif
jpayne@68 364 #ifndef __armhf__
jpayne@68 365 #undef __armhf__
jpayne@68 366 #endif
jpayne@68 367 #ifndef __arm64_ilp32__
jpayne@68 368 #undef __arm64_ilp32__
jpayne@68 369 #endif
jpayne@68 370 #ifndef __arm64__
jpayne@68 371 #undef __arm64__
jpayne@68 372 #endif
jpayne@68 373 #ifndef __hppa__
jpayne@68 374 #undef __hppa__
jpayne@68 375 #endif
jpayne@68 376 #ifndef __hppa64__
jpayne@68 377 #undef __hppa64__
jpayne@68 378 #endif
jpayne@68 379 #ifndef __ia64_ilp32__
jpayne@68 380 #undef __ia64_ilp32__
jpayne@68 381 #endif
jpayne@68 382 #ifndef __ia64__
jpayne@68 383 #undef __ia64__
jpayne@68 384 #endif
jpayne@68 385 #ifndef __loongarch64__
jpayne@68 386 #undef __loongarch64__
jpayne@68 387 #endif
jpayne@68 388 #ifndef __m68k__
jpayne@68 389 #undef __m68k__
jpayne@68 390 #endif
jpayne@68 391 #ifndef __mips__
jpayne@68 392 #undef __mips__
jpayne@68 393 #endif
jpayne@68 394 #ifndef __mipsn32__
jpayne@68 395 #undef __mipsn32__
jpayne@68 396 #endif
jpayne@68 397 #ifndef __mips64__
jpayne@68 398 #undef __mips64__
jpayne@68 399 #endif
jpayne@68 400 #ifndef __powerpc__
jpayne@68 401 #undef __powerpc__
jpayne@68 402 #endif
jpayne@68 403 #ifndef __powerpc64__
jpayne@68 404 #undef __powerpc64__
jpayne@68 405 #endif
jpayne@68 406 #ifndef __powerpc64_elfv2__
jpayne@68 407 #undef __powerpc64_elfv2__
jpayne@68 408 #endif
jpayne@68 409 #ifndef __riscv32__
jpayne@68 410 #undef __riscv32__
jpayne@68 411 #endif
jpayne@68 412 #ifndef __riscv64__
jpayne@68 413 #undef __riscv64__
jpayne@68 414 #endif
jpayne@68 415 #ifndef __riscv32_ilp32__
jpayne@68 416 #undef __riscv32_ilp32__
jpayne@68 417 #endif
jpayne@68 418 #ifndef __riscv32_ilp32f__
jpayne@68 419 #undef __riscv32_ilp32f__
jpayne@68 420 #endif
jpayne@68 421 #ifndef __riscv32_ilp32d__
jpayne@68 422 #undef __riscv32_ilp32d__
jpayne@68 423 #endif
jpayne@68 424 #ifndef __riscv64_ilp32__
jpayne@68 425 #undef __riscv64_ilp32__
jpayne@68 426 #endif
jpayne@68 427 #ifndef __riscv64_ilp32f__
jpayne@68 428 #undef __riscv64_ilp32f__
jpayne@68 429 #endif
jpayne@68 430 #ifndef __riscv64_ilp32d__
jpayne@68 431 #undef __riscv64_ilp32d__
jpayne@68 432 #endif
jpayne@68 433 #ifndef __riscv64_lp64__
jpayne@68 434 #undef __riscv64_lp64__
jpayne@68 435 #endif
jpayne@68 436 #ifndef __riscv64_lp64f__
jpayne@68 437 #undef __riscv64_lp64f__
jpayne@68 438 #endif
jpayne@68 439 #ifndef __riscv64_lp64d__
jpayne@68 440 #undef __riscv64_lp64d__
jpayne@68 441 #endif
jpayne@68 442 #ifndef __s390__
jpayne@68 443 #undef __s390__
jpayne@68 444 #endif
jpayne@68 445 #ifndef __s390x__
jpayne@68 446 #undef __s390x__
jpayne@68 447 #endif
jpayne@68 448 #ifndef __sh__
jpayne@68 449 #undef __sh__
jpayne@68 450 #endif
jpayne@68 451 #ifndef __sparc__
jpayne@68 452 #undef __sparc__
jpayne@68 453 #endif
jpayne@68 454 #ifndef __sparc64__
jpayne@68 455 #undef __sparc64__
jpayne@68 456 #endif
jpayne@68 457 ])
jpayne@68 458
jpayne@68 459 ])
jpayne@68 460
jpayne@68 461
jpayne@68 462 dnl Sets the HOST_CPU_C_ABI_32BIT variable to 'yes' if the C language ABI
jpayne@68 463 dnl (application binary interface) is a 32-bit one, to 'no' if it is a 64-bit
jpayne@68 464 dnl one.
jpayne@68 465 dnl This is a simplified variant of gl_HOST_CPU_C_ABI.
jpayne@68 466 AC_DEFUN([gl_HOST_CPU_C_ABI_32BIT],
jpayne@68 467 [
jpayne@68 468 AC_REQUIRE([AC_CANONICAL_HOST])
jpayne@68 469 AC_CACHE_CHECK([32-bit host C ABI], [gl_cv_host_cpu_c_abi_32bit],
jpayne@68 470 [case "$host_cpu" in
jpayne@68 471
jpayne@68 472 # CPUs that only support a 32-bit ABI.
jpayne@68 473 arc \
jpayne@68 474 | bfin \
jpayne@68 475 | cris* \
jpayne@68 476 | csky \
jpayne@68 477 | epiphany \
jpayne@68 478 | ft32 \
jpayne@68 479 | h8300 \
jpayne@68 480 | m68k \
jpayne@68 481 | microblaze | microblazeel \
jpayne@68 482 | nds32 | nds32le | nds32be \
jpayne@68 483 | nios2 | nios2eb | nios2el \
jpayne@68 484 | or1k* \
jpayne@68 485 | or32 \
jpayne@68 486 | sh | sh[1234] | sh[1234]e[lb] \
jpayne@68 487 | tic6x \
jpayne@68 488 | xtensa* )
jpayne@68 489 gl_cv_host_cpu_c_abi_32bit=yes
jpayne@68 490 ;;
jpayne@68 491
jpayne@68 492 # CPUs that only support a 64-bit ABI.
jpayne@68 493 changequote(,)dnl
jpayne@68 494 alpha | alphaev[4-8] | alphaev56 | alphapca5[67] | alphaev6[78] \
jpayne@68 495 | mmix )
jpayne@68 496 changequote([,])dnl
jpayne@68 497 gl_cv_host_cpu_c_abi_32bit=no
jpayne@68 498 ;;
jpayne@68 499
jpayne@68 500 *)
jpayne@68 501 if test -n "$gl_cv_host_cpu_c_abi"; then
jpayne@68 502 dnl gl_HOST_CPU_C_ABI has already been run. Use its result.
jpayne@68 503 case "$gl_cv_host_cpu_c_abi" in
jpayne@68 504 i386 | x86_64-x32 | arm | armhf | arm64-ilp32 | hppa | ia64-ilp32 | mips | mipsn32 | powerpc | riscv*-ilp32* | s390 | sparc)
jpayne@68 505 gl_cv_host_cpu_c_abi_32bit=yes ;;
jpayne@68 506 x86_64 | alpha | arm64 | aarch64c | hppa64 | ia64 | mips64 | powerpc64 | powerpc64-elfv2 | riscv*-lp64* | s390x | sparc64 )
jpayne@68 507 gl_cv_host_cpu_c_abi_32bit=no ;;
jpayne@68 508 *)
jpayne@68 509 gl_cv_host_cpu_c_abi_32bit=unknown ;;
jpayne@68 510 esac
jpayne@68 511 else
jpayne@68 512 gl_cv_host_cpu_c_abi_32bit=unknown
jpayne@68 513 fi
jpayne@68 514 if test $gl_cv_host_cpu_c_abi_32bit = unknown; then
jpayne@68 515 AC_COMPILE_IFELSE(
jpayne@68 516 [AC_LANG_SOURCE(
jpayne@68 517 [[int test_pointer_size[sizeof (void *) - 5];
jpayne@68 518 ]])],
jpayne@68 519 [gl_cv_host_cpu_c_abi_32bit=no],
jpayne@68 520 [gl_cv_host_cpu_c_abi_32bit=yes])
jpayne@68 521 fi
jpayne@68 522 ;;
jpayne@68 523 esac
jpayne@68 524 ])
jpayne@68 525
jpayne@68 526 HOST_CPU_C_ABI_32BIT="$gl_cv_host_cpu_c_abi_32bit"
jpayne@68 527 ])